Journal Paper

Paper Title - Design Of Fixed-Width Booth Multiplier Using MLCP In Fir Application


Abstract
Multiplier plays an important role in digital signal processing circuits. It requires considerable power and area. Normally a fixed width multiplier is used to reduce the power and area occupied by the multiplier on a chip. The proposed method consists of designing a fixed width multiplier using booth algorithm. It simplifies structure of multiplier to reduce power and improve performance of the circuit. Fixed width multiplier receives two numbers, each of n bit long and produces an n bit product. The direct truncation of least significant part of the product produces the large error in the resultant product if fixed width output is the requirement. This paper proposes a truncation error reducing logic that is multi-level conditional probability (MLCP) which considerably reduces truncation error. Index Terms— MLCP, booth multiplier, fixed width multiplier, truncation.


Author - Abinaya M., Kashwan K. R.

Citation - Abinaya M.   ,   Kashwan K. R.   ,   Abinaya M., Kashwan K. R. " Design Of Fixed-Width Booth Multiplier Using MLCP In Fir Application " , International Journal of Industrial Electronics and Electrical Engineering , Volume-3, Issue-7  ( Jul, 2015 )

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| Published on 2015-07-06