Journal Paper

Paper Title - A Highly Linear Low Noise CMOS LNA For Wireless Communication Applications


Abstract
In this paper, the design of a highly linear wideband CMOS low-noise amplifier (LNA) for wireless communication applications ranging from 600 MHz to 3 GHz using 0.13-μm technology is described. Here, CMOS inverter based wideband LNA is used in this design. Input Impedance matching is achieved by using negative resistive feedback along with feed-forward topology. The proposed amplifier achieves wideband input matching with S11 of less than -10 dB for overall bandwidth range. The designed LNA demonstrates a 33--24dB voltage gain (S21), 1.6—1.9dB noise figure (NF) with IIP3 of +8.02dB. The design drains 13mA of current from 1.2v supply with power consumption of 15.6mW. Index Terms—CMOS inverter, Low noise, inductorless, Noise Figure, Noise cancelling, Wideband amplifiers.


Author - Chinmay Deshpande, Savita R. Pawar

Citation - Chinmay Deshpande   ,   Savita R. Pawar   ,   Chinmay Deshpande, Savita R. Pawar " A Highly Linear Low Noise CMOS LNA For Wireless Communication Applications " , International Journal of Industrial Electronics and Electrical Engineering , Volume-3,Issue-11  ( Nov, 2015 )

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| Published on 2015-12-01