Digital Post-Correction Of Analog-To-Digital Converter
As the rapid change in the wireless communication system and mobile video devices, the integrated chip with
less power consumption and maximum conversion efficiency is needed. ADC and DAC are playing an important role in
these applications. The aim of this paper is to verify a post-correction method which is used for improving the performance
of ADC. Which effectively minimize both static nonlinearities and memory effects. Refer to this model, one post-correction
method is described and verified. Based on the post-correction, this method is used to modify the output signals which have
been converted from analog to digital format by adding a correction term. Simulation results show excellent performance
using this method.
Keywords— Volterra Series, THD, SiNAD, SFDR, Post-Correction Model, ADC.