High Performance Adaptive Binary Arithmetic Coder Used In SPIHT
The CABAC design is based on the key elements ofbinarization, context modeling, and binary arithmetic coding.
Binarization makes efficient binary arithmetic coding via a unique mapping of nonbinary syntax elements to a sequence of
bits, which are called bins. Each bin can either be processed in the regular coding mode or the bypass mode. The latter is
chosen for selected bins in order to allow a speedup of the whole encoding (and decoding) process means of simplified non
adaptive coding benefit, where a bin may be context modeled and subsequently arithmetic encoded. A pipeline register is
inserted between context memory and the binary arithmetic decoder to reduce the critical path of the loop. The speed of the
SPIHT algorithm is increased by using CABAC then using Arithmetic Coder. The Coding is done in VHDL language and
synthesized using Xilinx ISE 13.2 and simulated using ISim. As a design decision, the speed of the SPIHT algorithm is
increased by using CABAC than using Arithmetic Coder.